In recent years, displays for computers, television apparatuses, etc. have been growing in size and, at the same time, have been required to be manufactured with superhigh performance at low cost.
For manufacturing of displays with superhigh performance at low cost, it is necessary to achieve both TFTs (thin-film transistors) comparable in performance to single-crystal silicon (the word “silicon” being hereinafter abbreviated as “Si”) and a reduction in manufacturing cost.
However, conventional TFT processes, such as a-Si (amorphous silicon) process and a poly-Si (polycrystalline silicon) process, are unable to give a TFT (thin-film transistor) with desired performance and, what is even worse, require giant vacuum equipment, a laser crystallization apparatus, an exposure machine, etc., thus making it difficult to even reduce manufacturing cost.
For example, (a) and (b) of FIG. 31 show a case where circuit elements such as pixels are formed on a larger-area glass substrate through an existing large-size liquid-crystal TFT process (such as the a-Si process or the poly-Si process). According to this method, as shown in (a) of FIG. 31, a Si film 202 such as an a-Si film is formed on a glass substrate 201. Further, in the case of the poly-Si process, the Si film 202 is crystallized by laser irradiation. Next, a photolithographic method is used so that as shown in (b) of FIG. 31, the Si film 202 forms into semiconductor elements at a predetermined pixel pitch.
However, this method makes it necessary to form the Si film 202 on the entire surface of the glass substrate 201 or to crystallize the entire surface of the glass substrate 201 by using a laser crystallization apparatus. Therefore, along with the increase in size of glass substrates (10th-generation size: 3.1 m×2.9 m), this method requires expensive apparatuses such as giant vacuum equipment and a laser crystallization apparatus, thus requiring huge initial investments.
Further, due to a localized level within a gap due to incompleteness of crystallinity and a defect or intra-gap localized level in the vicinity of a crystal grain boundary, a decrease in electron (or hole) mobility and an increase in S coefficient (subthreshold coefficient) occur. For this reason, there is a great deal of variation in performance among TFTs, and the resulting TFTs require a measurable amount of power.
In view of this, a method for manufacturing a high-performance, low-cost display by fabricating a plurality of elements on a small-area substrate and transferring the elements onto a large-area glass substrate so that the elements are dispersedly arranged in an array was devised.
(a) and (b) of FIG. 32 and (a) to (d) of FIG. 33 each show a method for transferring semiconductor elements onto a large-area glass substrate.
According to the method shown in (a) and (b) of FIG. 32, first, as shown in (a) of FIG. 32, semiconductor elements 205, such as Si devices or circuit elements, fabricated on a small-area Si substrate 204 through an existing IC (integrated circuit) process are diced (divided) into separate semiconductor elements 205 to form chips having their respective semiconductor elements 205. Next, as shown in (b) of FIG. 32, the chips 206 are dispersedly transferred or bonded to a large-area glass substrate 207 or the like.
The transfer is carried out by using the so-called Smart-Cut (registered trademark) method, which involves the use of hydrogen ion implantation and heat treatment, for example. Alternatively, the bonding is carried out, for example, by using die bonding.
The technique in the example shown in (a) and (b) of FIG. 32 which involves the use of the Smart-Cut method for the transfer is described, for example, in Patent Literatures 1, 2, etc. below of the inventions made by the inventor of the present application and other people.
The foregoing method is an effective method in such a case of a driver of a panel or the like where the semiconductor elements are divided into several tens to several hundreds of chips (several millimeters in size) and the chips are bonded. However, in such a case of pixel TFTs where the semiconductor elements are divided into several millions of chips (several tens of millimeters in size) and the chips are bonded, the foregoing method is unrealistic in terms of both throughput and handling.
According to the methods shown in (a) and (b) of FIG. 33 and in (c) and (d) of FIG. 33, the Smart-Cut method is used for the transfer as in the case of the method shown in (a) and (b) of FIG. 32. However, according the methods shown in (a) to (d) of FIG. 33, semiconductor elements 210 fabricated on a Si substrate 209 are bonded to a large-area glass substrate 208 without being divided into chips.
For this reason, the methods shown in (a) to (d) of FIG. 33 eliminate the need to divide the Si substrate 209 provided with the semiconductor elements 210 into a large number of chips. However, since it is necessary to separate the semiconductor elements 210 by heat treatment after having bonded the semiconductor elements 210 to the large-area glass substrate 208, all of the semiconductor elements 210 on the Si substrate 290 are inevitably transferred onto the large-area glass substrate 208.
Therefore, in such a case as that shown in (a) and (b) of FIG. 33 where the number of semiconductor elements 210 to be formed on the Si substrate 209 is large (i.e., the pitch at which the semiconductor elements 210 are to be formed is narrow), the semiconductor elements 210 cannot be transferred onto the large-area glass substrate 208 at such wide intervals such as the pixel pitch.
For the transfer of the semiconductor elements 210 at wide intervals, the semiconductor elements 210 needs to be formed on the Si substrate 209 at wide intervals corresponding to the pixel pitch, as shown in (c) and (d) of FIG. 33. In this case, however, the number of semiconductor elements 210 that can be transferred from a single Si substrate 209 is so small that the efficiency in the use of the Si substrate 209 is very low.
Further, as mentioned above, in the case of use of the Smart-Cut method for the transfer, the whole Si substrate is inevitably heated. This makes it difficult to selectively transfer only the semiconductor elements that need to be transferred.
In response to such problems as those described above, Patent Literature 3 below discloses a method for forming a plurality of semiconductor elements at small intervals on a Si substrate and then transferring the semiconductor elements onto a large-area final substrate by selectively dispersing the semiconductor elements without dividing the semiconductor elements into chips.
The transfer method described in Patent Literature 3 is described below with reference to (a) to (h) of FIG. 34.
According the method described in Patent Literature 3, first, as shown in (a) of FIG. 34, semiconductor elements 222, such as Si devices or circuit elements, are formed on a surface of a Si substrate 221.
Next, as shown in (b) of FIG. 34, that surface of the Si substrate 221 on which the semiconductor elements have been formed is bonded to a holding substrate 223 with a first adhesive tape 224 (first transfer), and after that, the back surface of the Si substrate 221 (surface opposite to the surface on which the semiconductor elements have been formed) is ground by a grinder 225 or the like so that the Si substrate 221 turns into a thin film.
Next, as shown in (c) of FIG. 34, the back surface of the Si substrate 221 is joined to a pickup substrate 226 with a second adhesive tape 227, and the first adhesive tape 224 and the holding substrate 223 are separated from each other by heating the first adhesive tape 224 via the holding substrate 223. Thus, as shown in (d) of FIG. 34, the Si substrate 221 is transferred from the holding substrate 223 to the pickup substrate 226 (second transfer).
After that, as shown in (e) of FIG. 34, a resist pattern 228 in a predetermined shape is formed on the Si substrate 221, and with the resist pattern 228 used as a mask, the Si substrate 221 is cut into separate semiconductor elements 222 in a matrix manner by sandblasting or the like.
Next, as shown in (f) of FIG. 34, of the plurality of semiconductor elements 222 separated from each other in the matrix manner, only necessary semiconductor elements 222 are selectively sucked by a vacuum chuck 229 having an array of sucking holes at the same intervals as the pixel pitch (third transfer).
After that, as shown in (g) of FIG. 34, the semiconductor elements 222 sucked by the vacuum chuck 229 are transferred onto a large-area final substrate 231 formed with a thermoplastic resin film 230, in such a way as to be buried in the thermoplastic resin film 230 (fourth transfer).
Thus, as shown in (h) of FIG. 34, some of the plurality of semiconductor elements 222 are transferred to the large-area final substrate 231.